Engineering Blog
10 Communication Bus Timing and Termination Mistakes
Digital communication failures often begin below the protocol layer. Correct register settings cannot repair an invalid pull-up window, a badly terminated bus, excessive skew, an unsupported common-mode voltage, or an unrealistic latency budget.
- Reading Time
- 17 min
- Difficulty
- Intermediate
- Last Updated
- September 29, 2026
Separate Rate, Timing, and Physical Layer
A communication design has at least three related but distinct budgets: how many bits cross the wire, whether endpoints sample those bits at valid times, and whether the electrical waveform crosses valid thresholds.
Formula reference
Useful throughput
Throughput = line_rate × payload_bits / transmitted_bitsSerialization_time = transmitted_bits / line_rateVariable definitions
- line_rate
- physical bit or symbol-derived bit rate
- payload_bits
- application data bits
- transmitted_bits
- payload plus framing and protocol overhead
- Serialization_time
- wire time before queuing and processing
See the Serial Interface Timing, Pull-Ups, Termination, and Cabling Guide for protocol-specific calculation workflows.
Ten Communication Design Mistakes
Mistake #1: Treating Baud Rate as Payload Throughput
Start, stop, parity, addressing, framing, encoding, acknowledgments, gaps, and protocol headers consume line time.
Better approach: Calculate frame efficiency and transaction overhead instead of equating symbol or bit rate with application data rate.
Mistake #2: Ignoring Clock Error Accumulation
Asynchronous UART sampling drifts across a frame when transmitter and receiver clocks differ. A nominal baud match does not guarantee sampling margin.
Better approach: Budget both endpoint errors, frame length, oversampling behavior, and receiver tolerance.
Mistake #3: Choosing I2C Pull-Ups From One Typical Value
Pull-ups must satisfy both rise-time and low-level sink-current limits. Bus capacitance, voltage, speed mode, leakage, and device capability all matter.
Better approach: Calculate the valid resistance window and validate rise time on the assembled bus.
Mistake #4: Assuming SPI Has No Timing Limit
SPI has no universal cable length or frequency guarantee. Propagation delay, skew, return path, driver edge rate, and slave timing set the real limit.
Better approach: Check setup, hold, clock-to-output, trace delay, topology, and edge quality at the receiver pins.
Mistake #5: Using CAN Bit Rate Without a Sample-Point Plan
Nominal baud rate can be correct while propagation segment, phase segments, oscillator tolerance, and sample point are unsuitable for the network.
Better approach: Design timing quanta and sample point against bus length, transceiver delay, and node tolerance.
Mistake #6: Terminating Every Node
Parallel termination belongs at transmission-line ends. Extra terminators overload drivers and distort differential amplitude.
Better approach: Identify the physical trunk ends; keep stubs short and terminate according to the interface topology.
Mistake #7: Confusing RS-232 and RS-485 Electrical Rules
RS-232 is single-ended and point-to-point; RS-485 is differential and supports multidrop buses. Their voltage levels, grounding, termination, and topology differ.
Better approach: Apply the correct physical-layer rules rather than treating both as generic serial ports.
Mistake #8: Ignoring Common-Mode and Ground-Potential Limits
Differential signaling rejects some common-mode noise but transceivers still have finite common-mode ranges and surge ratings.
Better approach: Review grounding, shielding, isolation, biasing, protection, and expected ground offset.
Mistake #9: Estimating Latency From Serialization Alone
Queuing, arbitration, retries, processing, buffering, polling, software scheduling, and propagation add latency.
Better approach: Separate serialization, protocol, network, processing, and worst-case contention terms.
Mistake #10: Debugging Protocol Before the Physical Layer
Software traces can distract from slow edges, ringing, wrong levels, missing bias, swapped polarity, and poor return paths.
Better approach: Measure power, idle levels, edge shape, differential voltage, clock, and timing at the receiver before changing firmware.
Practical Examples
UART frame efficiency
An 8-N-1 UART frame carries 8 payload bits in 10 transmitted bits. At 115200 baud, the ideal payload ceiling is 92.16 kbit/s before packet gaps and higher-level overhead.
I2C resistance window
A pull-up must be low enough to charge bus capacitance within the allowed rise time and high enough that devices can sink the resulting low-state current while meeting VOL.
RS-485 termination load
Two 120 Ω end terminators appear as about 60 Ω differential load to the driver. Adding termination at every node can quickly violate drive capability.
Latency budget
A 100-byte message at 1 Mbit/s needs at least 0.8 ms for raw bits. Framing, arbitration, response time, retries, and software can make end-to-end latency several times larger.
Bring-Up Workflow
- 1. Confirm interface electrical standard, voltage levels, topology, and pinout.
- 2. Calculate nominal timing, frame overhead, sample point, and latency budget.
- 3. Check pull-up, termination, bias, cable, and common-mode requirements.
- 4. Review propagation delay, edge rate, trace or cable impedance, return path, and stubs.
- 5. Measure at the receiving node rather than only at the transmitter.
- 6. Test minimum and maximum voltage, temperature, data rate, loading, and cable length.
- 7. Add protocol decoding only after waveform levels and timing are credible.
- 8. Validate error handling, arbitration, retries, and worst-case software latency.
Summary
Reliable communication requires agreement between protocol rate, frame overhead, timing margin, voltage thresholds, topology, transmission-line behavior, common-mode range, and software latency. Calculate each layer separately, then validate the waveform at the receiver in the real network.
Support reference
FAQ
Is baud rate the same as bit rate?
Not always. Baud is symbol rate. They are numerically equal only when each symbol carries one bit, as in common binary UART signaling.
Why is UART payload throughput lower than baud rate?
UART adds start, stop, and optional parity bits. Packet framing and idle gaps reduce application throughput further.
How do I choose an I2C pull-up resistor?
Calculate the range bounded by rise-time/bus-capacitance requirements and the devices' low-level sink-current capability, then verify the waveform.
Does SPI have a maximum cable length?
No universal value exists. The limit depends on clock and edge rate, topology, impedance, return path, driver strength, receiver timing, and noise.
Where should CAN or RS-485 termination be placed?
Normally at the two physical ends of the main bus, using the characteristic impedance specified for the cable or network.
Why are long stubs a problem?
A stub creates a transmission-line discontinuity. Reflections return to the trunk and can disturb thresholds and timing.
What causes communication latency besides data rate?
Framing, arbitration, queuing, retries, processing, buffering, propagation, polling intervals, and software scheduling all contribute.
What should I measure first when a bus is unreliable?
Check supply and ground, idle levels, voltage thresholds, edge shape, ringing, timing at receiver pins, termination, topology, and noise before assuming a protocol bug.