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Engineering Reference

BJT Packages, Pinouts and Bias Terms Reference

Lookup BJT package families, pinout verification rules, bias terminology and small-signal terms without assuming a universal lead order or transistor gain.

Package and Pinout Lookup

BJT package families and pinout boundaries
PackageUsePinout realityVerification
TO-92Through-hole small signalE-B-C, C-B-E and E-C-B variants all existFlat face is not enough; verify the exact datasheet
SOT-23Small SMDMultiple B-C-E arrangements and dual-device variantsTop codes are not globally unique
SOT-223Medium-power SMDTab/large lead often has an electrical connectionCheck pinout, copper-area and thermal test conditions
DPAK / D2PAKPower SMDTab is commonly collector but is not a universal assumptionInsulation and PCB thermal design are application-specific
TO-220 / TO-247Lead-mounted powerSeveral lead orders exist; tab may be collectorHeatsink isolation, torque and interface material matter

Bias and Small-Signal Terms

BJT bias terminology
TermMeaningDesign boundary
Q pointDC collector current and collector-emitter voltage operating pointMust remain valid across beta, temperature, supply and load variation
Bias dividerNetwork establishing a base-voltage targetIts loading by base current changes the unloaded divider voltage
Emitter degenerationEmitter resistance providing local negative feedbackReduces gain but improves bias stability and linearity
Forced betaIC/IB ratio intentionally used for switch saturation designNot the same as datasheet small-signal hFE
Transconductance gmSmall-signal collector-current slope versus VBEOperating-current and temperature dependent
rπSmall-signal base-emitter resistance in the hybrid-pi modelDepends on beta and gm at the operating point
Voltage gainIncremental output/input voltage ratioDepends on collector load, emitter degeneration, source and transistor parameters
Darlington pairTwo BJTs connected for high composite current gainHas higher voltage drop and different saturation behavior than one BJT

Pinout Verification

  1. Read the exact ordering code and suffix.
  2. Match the package drawing and viewing direction.
  3. Identify emitter, base, collector and any exposed tab.
  4. Confirm PCB footprint orientation.
  5. For unknown parts, use measurement only as supporting evidence.

Model Boundary

Bias and small-signal equations describe an operating point, not a universal transistor. Recalculate across supply, temperature and parameter spread, then verify VCE, IC, power, SOA and junction temperature.

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FAQ

Is every TO-92 transistor pinout the same?

No. E-B-C, C-B-E and other lead orders are used. Verify the exact manufacturer datasheet.

Does a SOT-23 top code uniquely identify a transistor?

No. Codes can be reused across manufacturers and package variants.

What is a BJT Q point?

It is the DC operating point, commonly described by collector current and collector-emitter voltage before the signal variation is applied.

Why does a base divider voltage change when connected?

Base current loads the divider, so the actual base voltage differs from the unloaded divider result.

What is emitter degeneration?

Emitter resistance creates local negative feedback that generally improves bias stability and linearity while reducing gain.

Is forced beta the same as hFE?

No. Forced beta is a conservative design ratio used to set switch base drive; hFE is a condition-dependent transistor characteristic.

What is transistor gm?

Transconductance is the small-signal change in collector current per change in base-emitter voltage around a defined operating point.

Can package type determine BJT power rating?

No. Junction temperature, thermal resistance, PCB or heatsink conditions, voltage, current and SOA all matter.