Engineering Guide
BJT Gain, Darlington Pairs, and Common-Emitter Small-Signal Design
A useful BJT gain stage begins with a stable operating point and ends with a loaded, bandwidth-aware small-signal model. Beta alone does not predict voltage gain, input impedance, output swing, or temperature behavior.
Amplifier Design Workflow
| Step | Action | Engineering Check |
|---|---|---|
| Define the signal | Set source resistance, input amplitude, frequency range, required voltage swing, load, and acceptable distortion. | |
| Choose the operating point | Place collector current and collector-emitter voltage far enough from cutoff, saturation, and power limits. | |
| Build the DC bias | Use a divider and emitter resistor stiff enough for the required beta spread without wasting excessive current. | |
| Calculate small-signal parameters | Derive transconductance, intrinsic emitter resistance, input resistance, and unloaded gain at the quiescent current. | |
| Apply loading | Include collector load, following-stage input resistance, source resistance, and finite transistor output resistance when important. | |
| Set degeneration and bypassing | Choose unbypassed emitter resistance for stable gain or a bypass network for frequency-dependent gain. | |
| Check swing and power | Verify both signal peaks remain in the forward-active region and respect junction temperature and SOA. | |
| Validate | Measure the actual bias point, gain, clipping symmetry, bandwidth, noise, and temperature drift on hardware. |
Gain Terms That Must Stay Separate
| Quantity | Definition | Boundary |
|---|---|---|
| DC beta (hFE) | IC/IB at a stated operating point | Varies widely with current, voltage, temperature, and device lot |
| Small-signal beta | Incremental current gain around the bias point | May differ from the datasheet DC test value |
| Transconductance gm | IC/VT | Sets intrinsic voltage-to-current gain and rises with collector current |
| Intrinsic emitter resistance re | VT/IE, approximately 1/gm | Useful approximation; not an external physical resistor |
| Voltage gain | Output voltage change/input voltage change | Depends on emitter degeneration and collector loading, not beta alone |
| Darlington gain | Approximately beta1 x beta2 plus first-order terms | Real gain, leakage, speed, and saturation behavior are not ideal products |
| Headroom | Available signal swing before cutoff or saturation | A correct gain equation does not guarantee unclipped output |
Current Gain and Darlington Pairs
Formula reference
Current relationships
betaDC = IC/IBbetaDarlington = beta1 x beta2 + beta1 + beta2VBE,total = VBE1 + VBE2IE = IC + IBVariable definitions
- Use the beta range at the intended current and voltage
- Two junction drops reduce low-voltage headroom
- Darlington saturation and leakage differ from one transistor
- Current gain is not voltage gain
Use the BJT Gain Calculator and Darlington Pair Calculator for first-order current relationships. Then verify minimum gain, voltage drops, leakage, speed, and power from the selected datasheets.
Common-Emitter Small-Signal Model
Formula reference
Midband approximations
VT = kT/qgm = IC/VTre approximately 1/gmRC,ac = RC parallel RLAv approximately -RC,ac/(re + RE,unbypassed)Rin,base approximately rpi + (beta + 1)RE,unbypassedrpi = beta/gmVariable definitions
- These equations assume forward-active operation
- The collector load includes the following stage
- Emitter degeneration stabilizes gain
- Device capacitances and coupling networks set low- and high-frequency limits
Use the Common Emitter Amplifier Calculator and Small Signal Gain Calculator to organize the nominal model. Treat the result as a local linear approximation around the verified quiescent point.
Bias, Swing, Bandwidth, and Thermal Boundaries
The existing BJT selection and bias Guide owns divider bias, switching, and saturation workflows. For an amplifier, additionally verify that signal peaks do not drive the transistor into cutoff or saturation, that coupling and bypass capacitors meet low-frequency requirements, and that junction capacitance and Miller multiplication preserve high-frequency gain. Power dissipation and SOA must be checked over signal, load, supply, and temperature corners.
Worked Examples
Transconductance
At IC = 1 mA and VT = 25.85 mV, gm is about 38.7 mS and 1/gm is about 25.9 ohms.
Degenerated gain
With an effective collector load of 4.7 kohms and 470 ohms unbypassed emitter resistance, the midband gain is approximately -4.7k/(470 + 25.9), or -9.48 V/V.
Loaded collector
A 10 kohm collector resistor driving 10 kohms produces a 5 kohm effective AC collector load before transistor output resistance is included.
Input resistance
For beta = 100 and total AC emitter resistance of 496 ohms, base input resistance is roughly beta times that value, about 49.6 kohms.
Source attenuation
A 10 kohm source driving 49.6 kohms delivers about 83.2% of its open-circuit signal to the base network before bias-divider loading.
Darlington current
Two stages with beta1 = 80 and beta2 = 100 have an ideal composite gain near 8,180, not exactly 8,000 when first-order terms are retained.
Darlington voltage
A silicon Darlington commonly needs roughly two base-emitter drops, so a 1.4 V first estimate is more realistic than 0.7 V; measured value still depends on current and temperature.
Bypass corner
A 100 uF capacitor across a 470 ohm emitter resistor has a simple isolated RC corner near 3.39 Hz, but the actual resistance seen by the capacitor changes the real pole.
Collector swing
A 12 V stage biased at VC = 6 V has about 6 V upward ideal headroom, while downward headroom is limited by VE plus VCE(sat).
Power check
At VCE = 6 V and IC = 2 mA, transistor dissipation is 12 mW before signal-dependent changes; thermal limits still require worst-case analysis.
Common Mistakes
Related Calculators
Support reference
FAQ
What determines BJT current gain?
Current gain depends on device construction and operating point and varies with collector current, collector-emitter voltage, temperature, and lot. Use datasheet ranges and feedback rather than one typical value.
Is beta the same as voltage gain?
No. Beta is a current-gain parameter. Common-emitter voltage gain is set mainly by transconductance, emitter degeneration, collector loading, and output resistance.
How do I calculate BJT transconductance?
For a forward-active BJT, gm is approximately IC divided by thermal voltage VT. Near room temperature VT is about 25.85 mV.
What is intrinsic emitter resistance?
The small-signal intrinsic emitter resistance is approximately VT/IE or 1/gm under common approximations. It is a model parameter, not a physical resistor.
Why add an emitter resistor?
Emitter degeneration improves bias and gain stability, raises input resistance, and reduces distortion at the cost of voltage gain.
What does an emitter bypass capacitor do?
It reduces AC degeneration above its effective corner frequency while preserving DC feedback. The resistance seen by the capacitor must be used for accurate pole placement.
How is Darlington current gain calculated?
A first-order model gives betaTotal = beta1 x beta2 + beta1 + beta2. Leakage, loading, current sharing, and operating-point dependence reduce the usefulness of a single ideal number.
Why does a Darlington pair need more base voltage?
The input-to-output path includes two base-emitter junctions, so the required drive voltage is roughly two VBE drops and changes with current and temperature.
Why is my common-emitter gain lower than calculated?
Common causes are collector loading, source attenuation, unbypassed emitter impedance, finite output resistance, device capacitance, and operation outside the assumed midband region.
How do I check amplifier headroom?
Compare the quiescent collector voltage with the supply for upward swing and with emitter voltage plus the required minimum VCE for downward swing. Check both peaks under load.
Can a common-emitter stage drive any load?
No. A low load resistance reduces gain, increases required current, changes bias and swing, and may exceed power or SOA limits. Add a buffer when needed.
When should I use simulation or measurement?
Use device models and hardware measurements when bandwidth, distortion, noise, bias spread, temperature, large-signal swing, or parasitic capacitance matters.
Summary
Set and verify the DC operating point before calculating local small-signal parameters. Apply source, collector, and following-stage loading; use emitter degeneration intentionally; preserve headroom; and treat beta, Darlington gain, bandwidth, and temperature as operating-point-dependent quantities. Confirm final gain and clipping on hardware.