Op-Amp Guide

Op-Amp DC Precision Design: Offset, Bias Current, Resistor Tolerance, and Error Budgets

Convert an ideal gain calculation into a traceable DC accuracy budget with explicit sources, transfer gains, temperature limits, and bench evidence.

18 min · Advanced · Updated October 14, 2026

Define the Measurement Boundary

State the input range, source resistance, common-mode range, output load, supplies, temperature, warm-up, bandwidth, and required output accuracy. Separate op-amp error from reference, sensor, resistor network, ADC, and calibration error before combining them.

Nominal Gain and Noise Gain

Formula reference

Closed-Loop Reference

Non-inverting: Gsignal = 1 + Rf/RgInverting: Gsignal = -Rf/RinInverting noise gain: Gn = 1 + Rf/RinDifferential matched-ratio gain: Gd = R2/R1

Variable definitions

Use the signal gain for the intended input

Use noise gain for input offset and many input-referred error sources

Differential accuracy depends on resistor-ratio matching, not only individual tolerance

Use the ECParts gain calculators for nominal values before adding errors

Start with the Non-Inverting, Inverting, or Differential Amplifier Calculator, then keep unrounded resistor ratios in the error model.

Input Offset Voltage

Input offset is specified at defined supply, common-mode, output, and temperature conditions. Use maximum rather than typical values for a guaranteed budget, and include drift and long-term behavior when the design life or temperature span requires them.

Formula reference

Offset Contribution

Vout,os ≈ Vos × GnVos(T) ≈ Vos(Tref) + TCos(T - Tref)Input-referred error = Vout,error/Gn

Variable definitions

The polarity of offset is generally unknown

A linear drift coefficient is only a planning approximation

Auto-zero and chopper devices introduce ripple, settling, and source-impedance considerations

Output clipping invalidates the linear estimate

Bias Current and Source Resistance

Formula reference

Bias-Current Error

V+error = Ib+Rsource,+V-error = Ib-Rsource,-Vout,ib ≈ Gn(V+error - V-error)Ib = (Ib+ + Ib-)/2Ios = |Ib+ - Ib-|

Variable definitions

Use DC Thevenin resistance seen by each input

Input bias current can vary strongly with temperature and common-mode voltage

A compensation resistor near Rf || Rg cancels only part of average-current error

Sensor and protection networks belong in the source-resistance model

Resistor Ratio, CMRR, and Finite Loop Gain

Mechanism	Effect	Control
Feedback ratio tolerance	Closed-loop gain error	Matched network or calibrated ratio
Differential ratio mismatch	Common-mode conversion	Ratio tracking and symmetric layout
Finite open-loop gain	Gain below ideal	Adequate loop gain at operating frequency
Input CMRR	Common-mode-dependent input error	Keep common mode in range and budget CMRR
Output resistance and load	Load-dependent output error	Check output current and sense at the load
Reference/ground impedance	Added gain and offset error	Low-impedance reference and controlled return path

Formula reference

Finite-Gain Approximation

Gclosed ≈ Gideal/[1 + Gn/Aol]Fractional gain error ≈ Gn/Aol when Aol >> GnVcm-to-output error ≈ Vcm × Gn/CMRRratio

Variable definitions

Convert CMRR from dB using 10^(CMRRdB/20)

Use minimum open-loop gain and CMRR at the relevant conditions

This first-order model does not replace a full device macromodel

At frequency, use complex loop gain and stability analysis

Worst-Case and Statistical Budgets

Formula reference

Combining Errors

Worst case: |Etotal| ≤ Σ|Ei|RSS estimate: Erss = √(ΣEi²)Output error = Σ(input-referred source × transfer gain)Percent of reading = 100Eout/Vout,ideal

Variable definitions

Worst case supports guaranteed bounds when source limits are valid

RSS assumes suitable independent distributions

Correlated resistor drift must not be treated as independent

Calibration removes only observable repeatable terms and has its own uncertainty

Worked Error Budget

A non-inverting stage with gain 11 uses 100 kΩ and 10 kΩ. A 100 µV maximum offset contributes 1.10 mV at the output. If 20 nA bias current sees a 9.09 kΩ mismatch between input resistances, the first-order input error is 181.8 µV and the output contribution is 2.00 mV. A 0.1% worst-case gain-ratio error contributes about 5.5 mV at a 5.5 V ideal output. Summing magnitudes gives 8.6 mV before reference, CMRR, finite-gain, loading, drift, and measurement terms. Do not silently combine maximum offset with typical bias current.

Topology-Specific Notes

Differential amplifiers need matched ratios on both sides; individual 0.1% resistors do not guarantee 0.1% common-mode rejection.
Instrumentation amplifiers add gain-setting resistor tolerance, input common-mode limits, reference-pin error, and output headroom.
Summing amplifiers require an error transfer for every source and source resistance.
Voltage followers have unity signal and noise gain, but still retain offset, bias-current, common-mode, loading, and stability limits.
Input protection resistance can dominate bias-current error in precision circuits.

Verification Workflow

Verify ideal gain and output headroom over the full input range.
Refer every error source to one common input or output node.
Use guaranteed limits at matching test conditions where possible.
Separate deterministic worst-case and statistical yield calculations.
Simulate source resistance, common mode, output load, and supply corners.
Measure zero input, low/mid/high calibrated inputs, and both input polarities.
Repeat across temperature, supply, load, common mode, and warm-up.
Compare residuals with the predicted signature of each error source.

Common Mistakes

Multiplying offset by signal gain instead of noise gain.
Using typical values in a guaranteed worst-case budget.
Ignoring source and protection resistance.
Assuming a bias compensation resistor cancels offset current.
Adding correlated errors by RSS.
Treating individual resistor tolerance as ratio matching.
Ignoring common-mode-dependent offset and CMRR.
Omitting output load and ground-reference error.
Applying room-temperature accuracy over the full range.
Calibrating one point and assuming gain error is removed.

Scope Boundary

This guide addresses DC and low-frequency precision. Noise spectral density, dynamic settling, slew rate, stability, distortion, aliasing, and active-filter response require separate analyses. Device datasheet limits and measured system behavior take precedence over simplified equations.

Support reference

FAQ

What is input offset voltage?

It is the small differential input voltage required to force the ideal output condition. In a closed-loop circuit its output contribution is approximately offset voltage multiplied by noise gain.

How does input bias current create error?

Bias current flowing through source and feedback resistance creates voltage drops at the inputs. The differential part of those drops is amplified by the circuit noise gain.

Why is noise gain used for offset error?

Input-referred voltage errors appear as differential input signals and are amplified by the non-inverting closed-loop gain, even when the intended signal path is inverting or attenuating.

Should resistor tolerances be added worst case or RSS?

Use worst-case summation when guaranteed limits are required. RSS is a statistical estimate that needs independent, centered distributions and must not replace guaranteed analysis without justification.

Can a resistor on the non-inverting input cancel bias-current error?

Matching the DC resistance seen by both inputs can cancel part of the average bias-current effect, but input offset current, tolerance, source variation, and frequency-dependent impedance remain.

Does high open-loop gain eliminate gain error?

Finite loop gain creates closed-loop gain error. It may be small at DC but increases with frequency and depends on noise gain and the device open-loop response.

How should temperature drift be included?

Apply offset, bias-current, resistor-ratio, reference, and source drift over the specified temperature range, using guaranteed limits or measured distributions appropriate to the design.

How do I verify an op-amp DC error budget?

Measure zero-input offset and calibrated input points across supply, common-mode voltage, output load, source resistance, temperature, warm-up, and representative production units.