Motor Driver and H-Bridge Design: PWM, Current Paths, Braking, and Protection

Begin with the Operating Envelope

List startup, acceleration, steady load, reversal, braking, jam, and fault conditions. Current at zero speed can approach the resistance-limited stall value because back EMF is absent. As speed rises, back EMF reduces the voltage available to force winding current.

Use the DC Motor Stall Current Calculator for locked-rotor stress and the DC Motor Back EMF Calculator for speed-dependent electrical headroom.

H-Bridge States Define the Current Path

Never infer off-state current from the logic command alone. Winding current can flow through body diodes, external diodes, or synchronously driven channels. Fast decay, slow decay, coast, and brake produce different current ripple, torque, bus current, and loss.

PWM Voltage Is Only the First Layer

Use the Motor PWM Average Voltage Calculator to compare unipolar, bipolar, and custom voltage states. Do not convert duty directly into speed or torque.

Current Ripple and Decay

The winding follows L di/dt = Vapplied - Keω - iR. During each PWM state, the sign and magnitude of winding voltage determine whether current rises or decays. Higher PWM frequency usually reduces ripple but raises switching and gate-drive loss. Current-regulated drivers dynamically change duty, so command duty is not a fixed applied-voltage ratio.

• Use winding inductance and resistance at the relevant electrical frequency and temperature.
• Check minimum current for torque ripple and maximum current for saturation or protection.
• Account for diode forward drop, MOSFET RDS(on), blanking time, dead time, and current-sense filtering.
• Verify decay mode at low speed, where back EMF is small and current can rise rapidly.

Driver Loss and Thermal Design

The Motor Copper Loss Calculator and Motor Efficiency Calculator cover motor-side loss. Bridge semiconductor loss must be evaluated separately.

Braking and Bus-Energy Management

A rotating motor stores mechanical energy. During regenerative braking or rapid reversal, current can return energy to the DC bus. A laboratory supply may not sink that current, so bus voltage rises. Batteries have charge-current and protection limits; capacitors have voltage and ripple limits.

Protection and Fault Coordination

• Set current limit above required acceleration current but below destructive motor, switch, shunt, connector, and trace stress.
• Coordinate cycle-by-cycle limiting with slower jam detection and thermal shutdown.
• Handle shoot-through, undervoltage, gate-driver brownout, open motor, short to ground, short to supply, and stalled rotor.
• Provide inductive transient control and verify MOSFET SOA during current limiting and braking.
• Define a safe state for controller reset, disconnected logic, and unpowered gate driver.
• Do not rely on firmware alone for faults that can destroy hardware within one switching cycle.

Layout and Measurement

Minimize the commutation loop containing the bridge and local ceramic bus capacitor. Separate high-current paths from gate and current-sense returns. Use Kelvin routing for shunts and source references where supported. Probe VGS at the device source, use appropriate differential probes for switch nodes, and measure bus voltage during braking and supply disconnection.

Verification Workflow

1. Measure cold and hot winding resistance and verify stall-current assumptions.
2. Capture startup current, supply sag, and current-limit response with the real load.
3. Check forward, reverse, coast, brake, and PWM decay states at minimum and maximum duty.
4. Measure switch-node, gate, current, and bus waveforms simultaneously.
5. Test rapid reversal and worst-case regenerative braking with the intended source.
6. Reach thermal steady state at representative RMS current and ambient temperature.
7. Inject jam, open-load, short, brownout, and controller-reset faults.
8. Repeat at supply, load, temperature, and production-tolerance corners.

Common Mistakes

• Sizing the bridge from no-load current.
• Treating stall current as a continuous rating.
• Assuming PWM off-state voltage is always zero.
• Equating duty cycle with speed or torque.
• Ignoring current recirculation and decay mode.
• Using room-temperature typical RDS(on) for thermal design.
• Ignoring bus-voltage rise during braking.
• Reversing direction before current decays.
• Relying on firmware for cycle-scale shoot-through protection.
• Measuring gate voltage relative to distant board ground.

Scope Boundary

This guide addresses brushed-DC-style bridge power stages and transferable current-path principles. It does not replace FOC design, stepper current-control analysis, motor magnetic models, functional-safety assessment, EMC certification, or manufacturer-specific driver requirements. Validate critical drives with device models, transient simulation, calibrated measurement, thermal testing, and destructive-fault containment review.