Engineering Guide
Active and Application-Specific Filter Topologies
A response target does not uniquely select a circuit. This guide connects cutoff, Q, attenuation, and settling requirements to topology-specific impedance, component, active-device, tolerance, and loading decisions.
Topology Selection Workflow
| Step | Decision | Required Evidence |
|---|---|---|
| 1 | Define passband and stopband | Specify gain, allowable ripple, attenuation, phase or settling constraints, and frequency range. |
| 2 | Choose response order | Use the lowest order that meets attenuation while preserving phase, tolerance, noise, and stability. |
| 3 | Choose topology | Match impedance, gain, supply, component range, signal level, and application-specific constraints. |
| 4 | Calculate ideal values | Use the exact topology equations and schematic convention implemented by the design tool. |
| 5 | Select practical values | Check component ratios, standard values, tolerance, temperature coefficient, DC bias, and package parasitics. |
| 6 | Check active and passive limits | Verify GBW, slew rate, swing, noise, bias current, inductor current, ESR, DCR, and dissipation. |
| 7 | Run corner analysis | Recalculate response across component, source, load, supply, and temperature corners. |
| 8 | Simulate and measure | Verify gain and phase with the intended source, load, PCB, probes, sampling process, and operating amplitude. |
Topology Comparison
| Topology | Model | Interface | Strength | Primary Risk |
|---|---|---|---|---|
| Sallen-Key low-pass | Voltage-controlled voltage-source second-order stage | Low output impedance drive; modest-to-high input impedance | Buffering, gain, easy cascading | High Q becomes sensitive to gain and component ratios |
| Sallen-Key high-pass | Second-order AC-coupled active stage | Defined bias paths and op-amp input range | DC rejection with buffered passband | Startup transients and bias-current paths |
| MFB band-pass | Inverting multiple-feedback stage | Source drives an input resistor into the summing node | Compact gain and band selection | Input impedance, gain, Q, and component ratios are coupled |
| Twin-T notch | Passive bridge, optionally buffered or actively enhanced | High source and low load impedance improve the passive null | Deep rejection near one interference frequency | Notch depth is extremely sensitive to ratio matching |
| PWM RC smoothing | First-order averaging network | Digital source resistance and analog load affect the pole | Low cost DAC-like average | Ripple versus settling-time tradeoff |
| ADC anti-alias | Analog low-pass before sampling | ADC acquisition network and driver must settle | Limits out-of-band energy before sampling | A digital filter cannot remove already-aliased energy |
| CLC or CRC pi | Two shunt capacitors around a series element | Source/load impedance and damping define response | Supply ripple and conducted-noise reduction | LC peaking, inductor saturation, CRC DC drop |
Sallen-Key Low-Pass and High-Pass Stages
Formula reference
Second-order denominator
H(s) = N(s)/(s^2/w0^2 + s/(Qw0) + 1)For equal R and C in the adopted low-pass form: f0 = 1/(2 pi RC)Q and K depend on the exact Sallen-Key schematic and component ratiosVariable definitions
- w0 is natural angular frequency
- Q controls damping and possible peaking
- K is the non-inverting stage gain in the stated topology
Use the Sallen-Key Low-Pass and Sallen-Key High-Pass calculators only with their displayed component labels. Verify noise gain, GBW, slew rate, input common-mode range, output swing, output-current demand, and capacitive-load stability using the Active Filter and Op-Amp Dynamic Limits Guide.
Multiple-Feedback Band-Pass
Formula reference
Band-pass relationships
BW = f0/Qf0 = sqrt(fL fH)Q = f0/(fH - fL)Variable definitions
- These response relationships do not replace topology-specific component equations
- The MFB stage is inverting
- Center gain, Q, and input impedance are coupled through component ratios
The MFB Band-Pass Calculator defines one explicit topology. Do not transplant its equations to a differently labeled schematic. At high Q, component spread and op-amp finite gain can move both center frequency and bandwidth.
Twin-T Notch Filtering
Formula reference
Balanced Twin-T reference
fnotch = 1/(2 pi RC)R ratios and C ratios must match the adopted balanced networkNotch depth depends on ratio error, loading, and parasiticsVariable definitions
- The ideal null assumes an exactly balanced network
- Q enhancement requires an active topology with its own stability limits
- Frequency accuracy and notch depth are separate specifications
Use the Notch Filter Calculator to design and audit the stated Twin-T ratios. Matched arrays, trimming, buffering, and PCB symmetry can matter more to rejection depth than tighter absolute values.
PWM Smoothing
Formula reference
PWM and first-order RC
Vavg = D VH + (1 - D) VLfc = 1/(2 pi RC)Ripple follows exponential charge during ton and discharge during toffVariable definitions
- D is duty cycle
- A carrier-frequency magnitude estimate is not the exact time-domain ripple
- Lower cutoff reduces ripple but increases settling time
The PWM Low-Pass Filter Calculator evaluates average, carrier attenuation, exact steady-state RC ripple, and harmonics. Load buffering may be needed when the filter must drive a varying impedance.
ADC Anti-Alias Filtering
Formula reference
Sampling boundaries
fNyquist = fs/2falias = distance to the nearest integer multiple of fsRequired order follows passband, stopband, and attenuation targetsVariable definitions
- Nyquist is a folding boundary, not automatically the filter cutoff
- Out-of-band interferers can fold into the wanted band
- ADC acquisition settling is part of analog filter design
Use the ADC Anti-Alias Filter Calculator to evaluate guard band, folding, residual target, and ideal RC or Butterworth attenuation. Then verify driver output impedance, sampling capacitance, acquisition time, reference coupling, aperture effects, and the actual spectral environment.
CLC and CRC Pi Filters
Formula reference
Pi-filter checks
ZC = 1/(j 2 pi f C)ZL = j 2 pi f LVdrop,CRC = Iload RPloss,CRC = Iload^2 RVariable definitions
- CLC response is a loaded third-order network, not an isolated LC resonance
- CRC creates predictable damping but dissipates real power
- Input and output capacitor bias and ripple current must be checked
The Pi Filter Calculator models CLC and CRC transfer behavior with source and load terms. For CLC, check resonance, damping, inductor saturation, DCR, core loss, startup current, and control-loop interaction. For CRC, check DC regulation and resistor temperature.
Tolerance and Verification
Absolute tolerance moves frequency, while ratio tolerance often dominates Q, gain, or notch depth. Include capacitor voltage coefficient, temperature, aging, ESR, inductor DCR and bias, and resistor tracking. Use Monte Carlo analysis for distributions and worst-case analysis for guaranteed limits. Simulate the exact op-amp model and measure with the intended source, load, probes, sampling process, and PCB.
Worked Examples
Sallen-Key Butterworth stage
For the common equal-R, equal-C low-pass form, f0 = 1/(2 pi RC). A Butterworth Q of 0.707 requires the topology's specified gain relationship; copying K into a different schematic convention gives the wrong Q.
MFB band-pass
A 2 kHz center frequency and Q = 5 imply a 400 Hz reference bandwidth. The component solver must also satisfy the adopted inverting gain and resistor-ratio constraints.
Twin-T null
A balanced Twin-T uses paired R and C ratios around fnotch = 1/(2 pi RC). Small ratio errors can leave the notch frequency near target while greatly reducing rejection depth.
PWM averaging
For 20 kHz PWM and a 200 Hz RC cutoff, the carrier ratio is 100. The mean follows duty cycle, but exact ripple depends on charge and discharge during both parts of each period.
ADC guard band
With fs = 100 kS/s, Nyquist is 50 kHz. A 20 kHz passband leaves a 30 kHz transition band; order follows required attenuation at the nearest relevant interferer, not Nyquist alone.
CLC pi filter
A nominal LC resonance does not predict loaded ripple attenuation by itself. Source resistance, capacitor ESR, inductor DCR, load, and damping determine peaking and insertion loss.
CRC pi filter
Increasing the series resistor improves isolation but adds Iload R DC drop and Iload squared R loss. Verify worst-case load and startup current.
Op-amp feasibility
A mathematically correct 100 kHz, Q = 10 active stage can fail if noise gain, required GBW, slew rate, output swing, or capacitive-load stability is inadequate.
Common Mistakes
Related Calculators
Related Resources
Support reference
FAQ
How do I choose between Sallen-Key and multiple-feedback filters?
Sallen-Key offers non-inverting buffering and convenient cascading. MFB is inverting and can realize useful band-pass or high-Q responses compactly, but gain, input impedance, Q, and component ratios interact. Choose from the complete interface and device constraints.
Does a Sallen-Key cutoff always equal its natural frequency?
No. Natural frequency, -3 dB frequency, and any response peak depend on Q and gain. They coincide only under specific response conditions.
Why do Sallen-Key formulas differ between sources?
Component labels, capacitor placement, gain convention, and normalized transfer-function form differ. Use one fully specified schematic and its matching equations.
Why is a Twin-T notch shallow in hardware?
Notch depth depends strongly on matched resistor and capacitor ratios, source and load impedance, parasitics, and buffering. Frequency accuracy alone does not guarantee a deep null.
How do I choose an RC cutoff for PWM smoothing?
Set it low enough for required carrier and harmonic attenuation but high enough for response time. Then calculate exact steady-state ripple for duty-cycle extremes and the real load.
What is the anti-alias filter cutoff?
There is no universal value. It follows signal bandwidth, sample rate, transition band, required attenuation, ADC resolution or noise target, and expected out-of-band interferers.
Can a digital filter replace an analog anti-alias filter?
No. Once out-of-band energy folds into the sampled baseband, a digital filter generally cannot distinguish it from the wanted signal.
What is the difference between CLC and CRC pi filters?
CLC can provide strong reactive filtering with low DC drop but may resonate and requires current-rated magnetics. CRC is easier to damp but creates load-dependent voltage drop and resistor power loss.
Why does a pi filter peak?
The inductor and capacitors form a resonant network. Low source resistance, light loading, and low loss can create a high Q unless ESR, DCR, a damping branch, or intentional resistance controls it.
How much op-amp GBW does an active filter need?
It depends on topology, Q, noise gain, closed-loop gain, and accuracy target. A simple fixed multiple of cutoff is only a screening rule; use device models and response simulation.
How should filter tolerances be checked?
Preserve correlated component ratios where matched arrays are used, then run worst-case or Monte Carlo analysis for cutoff, Q, gain, notch depth, and attenuation. Include operating bias and temperature effects.
Do calculators replace circuit simulation?
No. Calculators establish consistent first-pass values and ideal response. SPICE and measurement are needed for device bandwidth, parasitics, nonlinear behavior, stability, tolerance distributions, and PCB interaction.
Summary
Choose a filter topology from the full signal-chain requirement, not cutoff alone. Keep schematic labels and formulas paired, include source and load impedance, verify active-device and passive-component limits, calculate tolerance behavior, and confirm the final response by simulation and measurement.